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| copyright ? 2013 future technology devices international limited 1 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 future technology devices international ltd. FT800 ( embedded video engine ) t he FT800 is a n easy to use g raphic c ontroller targeted for embedded application s to generate high - quality human machine interfaces (hmis) . it has the following features: ? FT800 functionality includes graphic controller, audio processing, and resistive touch controller. ? embedded video engine (eve) with widget support can offload the system mpu and provid e a variety of graphic features ? built - in graphics operations allow user s with little expertise to create high - quality display ? integrated with 4 - wire t ouch - screen c ontroller incorporating median filtering and touch force sensing. hardware engine can recognize touch tags and track touch movement. it provides notification for u p to 255 touch tag s. ? s tandard serial interface to host m p u /mcu with spi up to 30mhz or i 2 c cl ock ing up to 3 .4mhz ? programmable i nterrupt c ontroller provide s interrupts to host m p u /mcu ? built - in 12mhz crystal oscillator with pll provid ing 48mhz or 36mh z system clock ? video rgb parallel output ( default rgb data width of 6 - 6 - 6) with 2 bit dithering ; c onfigurable to support resolution up to 512 x 512 and lcd r/g/b data width of 1 to 6 ? p rogrammable t iming to adjust hsync and vsync timing , enabling interface to numerous displays ? support for lcd display in wqvga (480x272) and qvga (320x240) formats with data enable (de) support mode and vsync/hsync mode ? the FT800 calculates for 8 - bit colour despite only providing pins for 6 - bit (rgb - 6,6,6) ; this improves the half tone appearance ? display e nable control output to lcd panel ? mono audio channel output with pwm output ? built - in s ound synthesi zer ? audio wave playback for mono 8 - bi t l inear pcm, 4 - bit adpcm and - law coding format at sampling frequency from 8khz to 48khz. built - in digital filter reduce s the system d esig n complexity of external filter ing ? pwm output for backlight dimming control for led ? low power consumption for portable application , 24ma active (typical) and 250 ua sleep (typical) ? no frame buffer ram required ? advanced object oriented architecture enables low cost mpu /mcu as system host using i 2 c and spi i nterfaces ? power mode control allow s chip to be put in p ower down, s leep and s tandby states ? s upports host interface i/o voltage from 1. 8 v to 3. 3 v ? internal voltage regulator supplies 1.2 v to the digital core ? - 40c to 85c exten ded operating temperature range ? available in a compact pb - free , v qf n - 48 , 7mm x 7m m x 0.9mm package , rohs compliant
copyright ? 2013 future technology devices international limited 2 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 disclaimer: neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. this product and its documentation are supplied on an as - is basis and no warra nty as to their suitability for any particular purpose is either made or implied. future technology devices international ltd will not accept any claim for damages howsoever arising as a result o f use or failure of this product. your statutory rights are n ot affected. this product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in persona l injury. this document provides preliminary information that may be subject to change without notice. no freedom to use patents or other intellectual property rights is implied by th e publication of this document. future techn ology devices international ltd uni t 1, 2 seaward place centurion business park glasgow g41 1hh united kingdom scotland registered company number: sc136640 copyright ? 2013 future technology devices international limited 3 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 1 typical applications ? point of sale s machine s ? multi - function printer s ? i nstrumentation ? home security systems ? graphic touch pad C remote, dial pad ? tele / video conference systems ? phones and switchboards ? medical appli ances ? blood pressure displays ? heart monitors ? glucose level displays ? breathalyzers ? gas chromatographs ? power meter ? home appliance devices ? set - top box ? thermostats ? sprinkler system displays ? medical appliances ? gps / satnav ? vending machine control panels ? elevator controls ? and many more 1.1 part numbers part number package ft 800q - x 48 pin v qf n , pitch 0.5mm, body 7mm x 7mm x 0.9mm table 1 - video controller part numbers note: packaging codes for x is: - r: taped and reel , ( v qf n i n 25 00 p ie c e s per reel ) - t: tray packing, ( v qf n i n 2 5 0 p ie c e s per tray ) for example: ft 800q - r is 25 00 v qfn p ie c e s in taped and reel packaging copyright ? 2013 future technology devices international limited 4 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 2 FT800 block diagram figure 2 - 1 FT800 block diagram for a description of each function please refer to section 4. figure 2 - 2 FT800 system design diagram copyright ? 2013 future technology devices international limited 5 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 FT800 or eve (embedded video engine ) simplifies the system architecture for advanced human machine interfaces (hmis) by providing functionality for display, audio, and touch as well as an object oriented architecture approac h that extends from display creation to the rendering of the graphics. copyright ? 2013 future technology devices international limited 6 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 contents 1 typical applications ................................ ............................... 3 1.1 part numbers ................................ ................................ ............... 3 2 FT800 block diagram ................................ ............................. 4 3 device pin out and signal description ................................ ... 8 3.1 vqfn - 48 package pin out ................................ ............................ 8 3.2 pin description ................................ ................................ ............ 9 4 function description ................................ ............................ 14 4.1 serial host interface ................................ ................................ .. 14 4.1.1 spi interface ................................ ................................ ................................ ... 16 4.1.2 i2c interface ................................ ................................ ................................ ... 16 4.1.3 se rial data protocol ................................ ................................ .......................... 16 4.1.4 host memory read ................................ ................................ ........................... 16 4.1.5 host memory write ................................ ................................ .......................... 17 4.1.6 host command ................................ ................................ ................................ 17 4.1.7 interrupts ................................ ................................ ................................ ....... 18 4.2 system clock ................................ ................................ ............. 19 4.2.1 crystal oscillator ................................ ................................ .............................. 19 4.2.2 phase locked loop ................................ ................................ ........................... 20 4.2.3 clock enable ................................ ................................ ................................ .... 20 4.2.4 clock frequency ................................ ................................ .............................. 20 4.3 graphics engine ................................ ................................ ......... 20 4.3.1 introduction ................................ ................................ ................................ .... 20 4.3.2 rom and ram fonts ................................ ................................ ......................... 21 4.4 parallel rgb interface ................................ ............................... 24 4.5 miscellaneous control ................................ ................................ 26 4.5.1 backlight control pin ................................ ................................ ........................ 26 4.5.2 disp control pin ................................ ................................ .............................. 26 4.5.3 general purpose io pins ................................ ................................ ................... 26 4.5.4 pins drive current control ................................ ................................ ................. 26 4.6 audio engine ................................ ................................ .............. 27 4.6.1 sound synthesizer ................................ ................................ ........................... 27 4.6.2 audio playback ................................ ................................ ................................ 29 4.7 touch - screen engine ................................ ................................ . 29 4.8 power management ................................ ................................ ... 30 4.8.1 power supply ................................ ................................ ................................ ... 30 4.8.2 internal regulator and por ................................ ................................ ............... 31 copyright ? 2013 future technology devices international limited 7 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.8.3 power modes ................................ ................................ ................................ ... 32 5 FT800 memory map ................................ .............................. 36 5.1 FT800 registers ................................ ................................ ......... 37 6 devices characteristics and ratings ................................ .... 41 6.1 absolute maximum ratings ................................ ........................ 41 6.2 dc characteristics ................................ ................................ ...... 42 6.3 to uch sense characteristics ................................ ...................... 44 6.4 ac characteristics ................................ ................................ ...... 45 6.4.1 system clock ................................ ................................ ................................ ... 45 6.4.2 host interface spi mode 0 ................................ ................................ ................. 45 6.4.3 host interface i2c mode timing ................................ ................................ ......... 46 6.4.4 rgb video timing ................................ ................................ ............................ 47 7 application examples ................................ ........................... 49 7.1 examples of lcd interface connection ................................ ....... 49 8 package parameters ................................ ............................ 50 8.1 vqfn - 48 package dimensions ................................ ................... 50 8.2 solder reflow profile ................................ ................................ . 51 9 ftdi chip contact information ................................ ............ 52 appendix a C references ................................ ................................ .... 53 appendix b - list of figures and tables ................................ .............. 53 appendix c - revision history ................................ ............................. 55 copyright ? 2013 future technology devices international limited 8 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 3 device pin out and signal description 3.1 vqfn - 48 package pin out figure 3 - 1 pin configuration vqfn - 48 (top view) copyright ? 2013 future technology devices international limited 9 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 3.2 pin description table 3 - 1 ft 800q pin description pin no. name type description 1 audio_l o audio pwm out, p ush - pull output, 16ma sink/source current. pad powered from pin vcc. 2 gnd p g round 3 spi_ sclk / i2c_ scl i in spi mode: spi sclk input. in i2c mode: scl input, need external 1k copyright ? 2013 future technology devices international limited 10 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 continued pin no. name type description 9 vccio p i/o power supply, connect a 0.1uf decoupling capacitor . support 1.8v, 2.5v or 3.3v. note : vccio su pply to io pads from pin 3 to 12 only. 10 mode i host interface spi(pull low) or i2c(pull up) mode select input, 3.3v tolerant pad powered from pin vccio. 11 int_n od host interrupt, open drain output , active low, pull up to vccio through a 1k ~10k resistor. k copyright ? 2013 future technology devices international limited 11 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 continued pin no. name type description 24 backlight o led backlight brightness pwm control signal, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 25 de o lcd data enable, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 26 vsync o lcd vertical sync, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 27 hsync o lcd horizontal sync, push - pull output, 4/8ma sink/source current. pad powered from pin vcc. 28 disp o general purpose output pin for lcd display enable, p ush - pull output, 4/8ma sink/source current. control by writing to bit 7 of reg_gpio register. pad powered from pin vcc. 29 pclk o lcd pixel clock, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 30 b7 o bit 7 of blue rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 31 b6 o bit 6 of blue rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 32 b5 o bit 5 of blue rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 33 b4 o bit 4 of blue rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 34 b3 o bit 3 of blue rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 35 b2 o bit 2 of blue rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 36 gnd p ground copyright ? 2013 future technology devices international limited 12 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 continued pin no. name type description 37 g7 o bit 7 of green rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 38 g6 o bit 6 of green rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 39 g5 o bit 5 of green rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 40 g4 o bit 4 of green rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 41 g3 o bit 3 of green rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 42 g2 o bit 2 of green rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 43 r7 o bit 7 of red rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 44 r6 o bit 6 of red rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 45 r5 o bit 5 of red rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 46 r4 o bit 4 of red rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. copyright ? 2013 future technology devices international limited 13 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 continued note : p : power or ground i : input o : output od : open drain output i/o : bi - direction input and output ai/o : analog input and output pin no. name type description 47 r3 o bit 3 of red rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. 48 r2 o bit 2 of red rgb signals, p ush - pull output, 4/8ma sink/source current. pad powered from pin vcc. ep gnd p ground . e xpose d thermal pad. copyright ? 2013 future technology devices international limited 14 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4 function description the ft 800 is a single chip , embedded graphic controller with the following function blocks : ? serial host interface ? system clock ? graphics engine ? parallel rgb video interface ? audio engine ? touch - screen engine ? power management the functions for each block are briefly described in the following subsections. 4.1 serial host interface the ft 800 uses a standard serial interface to communicate with most types of microcontrollers and microprocessors . th e interface mode is configur able by pull down for spi and pull up for i 2 c on pin 10 (mode) . figure 4 - 1 s how s the two alternative mode connections . figure 4 - 1 host interface options copyright ? 2013 future technology devices international limited 15 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 figure 4 - 2 illustrates a direct connection to a 1.8 - 3.3v io mpu/mcu. figure 4 - 2 spi interface 1.8 - 3.3v connection figure 4 - 3 illustrates the FT800 connected to a 5v io mpu/mcu. the 74lcx125 logic buffer can tolerate 5v signal from the mpu/mcu, and the FT800 input signals are limited to 3.3v. figure 4 - 3 spi interface 5 v connection gnd gnd cs_n miso mosi sclk pd_n int_n cs_n miso mosi sclk pd_n int_n FT800 1.8-3.3v vio 3.3v vcc 4.7k 4.7k mpu/mcu 3.3v gnd 5v gnd gnd cs_n miso mosi sclk pd_n int_n cs_n miso mosi sclk pd_n int_n FT800 mpu/mcu 74lcx125 3.3v vio vcc 4.7k 4.7k copyright ? 2013 future technology devices international limited 16 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.1.1 spi i nterface the spi slave interface operate s up to 30mhz . o nly spi m ode 0 is supported . r efer to s ection 6.4.2 f or detail ed timing specification. the spi interface is selected when the mode pin is tied to gnd. 4.1.2 i 2 c i nterface the i 2 c slave interface operate s up to 3.4 mhz , supporting standard - mode, fast - mode, fast - mode plus and high - speed mode . r efer to section 6. 4.3 for detail ed timing specification. the i 2 c device address is configurable between 20h to 27h depend ing on the i 2 c_ sa[2:0] pin setting , ie the 7 - bit i2c slave address is 0b0100a 2 a 1 a 0 . the i 2 c interface is selected when the mode pin is tied to vccio. 4.1.3 serial d ata p rotocol the FT800 appears to the host mpu /mcu as a memory - mapped spi or i 2 c device. the host communicates with the FT800 using reads and writes to a large ( 4 megabyte) address space. within this address space are dedicated areas for graphics, audio and touch control. refer to s ection 5 for the detailed memory map . the host reads and writes the FT800 address space using spi or i 2 c transactions . the se transactions are memory read , memory write and command write . serial data is sent by the most significant bit first. for i 2 c transaction s, th e same byte sequence is enca psulate d in the i 2 c protocol . for spi operation, each transaction starts with cs_n goes low, and ends when cs_n goes high. theres no limit on data length within one transaction, as long as the memory address is continuous. 4.1.4 host memory read for spi memory read transaction , t he host sends two zero bit s , followed by the 2 2 - bit address. this is followed by a dummy byte . after the dummy byte, the FT800 responds to each host byte with read data bytes. table 4 - 1 host memory read transaction (spi) byte n 7 6 5 4 3 2 1 0 0 0 address [2 1 :16] address [15:8] address [7:0] d ummy byte byte 0 read data write address copyright ? 2013 future technology devices international limited 17 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 for i 2 c memory read transaction , bytes are pack ed in the i 2 c protocol as follow: [start] copyright ? 2013 future technology devices international limited 18 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 table 4 - 3 host command transaction (spi) for i 2 c command transaction, bytes are pack ed in the i 2 c protocol as follow s: [start] copyright ? 2013 future technology devices international limited 19 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 when the FT800 is in sleep mode, a touch event detected on the touch - screen will drive the int_n pin to low regardless the setting of reg_int_en and reg_int_mask. the mcu can use this signal to serve as a wakeup event. table 4 - 5 interrupt flags bit assignment bit 7 6 5 4 interrupt sources convcomplete cmdflag cmdempty playback conditions touch - screen conversions completed command fifo flag command fifo empty audio playback ended bit 3 2 1 0 interrupt sources sound tag touch swap conditions sound effect ended touch - screen tag value change touch - screen touch detected display list swap occurred 4.2 system clock 4.2.1 crystal oscillator (please refer to table 4 - 4, host command. it is required to enable pll from crystal or input clock for normal operation error! reference source not found. ) . the FT800 crystal oscillato r generates the input clock for system clock. either a 12mhz crystal or a 12mhz square wave clock can be used as clock source. figure 4 - 4 and shows the pin connections for these clock options. figure 4 - 4 crystal oscillator connection copyright ? 2013 future technology devices international limited 20 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 figure 4 - 5 external clock input 4.2.2 phase locked loop the internal pll takes 12mhz input from the crystal oscillator . the pll output s clock to all internal circuits, including graphics engine, audio engine and touch engine . 4.2.3 clock enable upon power on the FT800 enters standby mode. the system clock will be enabled when following steps are executed: - host sends an active command (dummy read at address 0) - host sends an clkext command - host writes to reg_pclk with non - zero value (ie 5) if spi is used as host interface, the spi clock shall not exceed 11mhz before system clock is enabled. after system clock is properly enabled, the spi clock is allowed to go up to 30mhz. 4.2.4 clock frequency by default the system clock is 48mhz. host is allowed t o switch the system clock between 48mhz and 36mhz by the host command clk48mhz and clk36mhz respectively. the clock switching is synchronised to vsync edge on the fly. this is to avoid possible graphics glitch during clock switching. as a result, the clock switch will only take effect if the reg_pclk is a non - zero value. 4.3 graphics engine 4.3.1 introduction the g raphics engine executes the display list once for every horizontal line. it executes the primitive objects in the display list and constructs the display line buffer. the horizontal pixel content in the line buffer is updated if the object is visible at the horizontal line. main features of the graphics engine are: copyright ? 2013 future technology devices international limited 21 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 ? the primitive objects supported by the graphics processor are: l ines, points, rectangles, bitmaps (comprehensive set of formats), text display, plotting bar graph, edge strips, and line strips, etc. ? operations such as stencil test, alpha blending and masking are useful for creating a rich set of effects such as shadows, transitions, reveals, fades and wipes. ? anti - aliasing of the primitive objects (except bitmaps) gives a smoothing effect to the viewer. ? bitmap transforma tions enable operations such as translate, scale and rotate. ? display pixels are plotted with 1/16 th pixel precision. ? four levels of graphics states ? tag buffer detection the graphics engine also supports customized build - in widgets and functionalities such as jpeg decode, screen saver, calibration etc. the graphics engine interprets commands from the mpu host via a 4 kbyte fifo in FT800 memory at ram_cmd . the mpu/mcu write s commands into the fifo, and the graphics engine reads and executes the commands. the mpu/mcu updates register reg_cmd_write to indicate that there are new commands in the fifo, and the graphics engine updates reg_cmd_read after commands have been execute d. main features supported are: ? drawing of widgets such as buttons, clock, keys, gauge s , text display s, progress bars, sliders, toggle switches, dials, gradients, etc. ? jpeg decode (only baseline is supported) ? inflate functionality (zlib inflate is support ed) ? timed interrupt (generate an interrupt to host processor after a specified number of milliseconds) ? in built animated functionalities such as displaying logo, calibration, spinner, screen saver and sketch ? snapshot feature to capture the current graphi cs display for a complete list of graphics engine display commands and widgets refer to FT800 programmer guide [ ftdi document ft_000793 ] , chapter 4. 4.3.2 rom and ram fonts the FT800 has built in rom character bitmaps as font metrics. the graphics engine can use these metrics when drawing text fonts. there are total 16 rom fonts, numbered with font handle 16 - 31. the user can define and load customized font metrics into ram_g, which can be used by display command with handle 0 - 15. each font metric block has a 1 48 byte font table which defines the parameters of the font and the pointer of font image . the font table format is shown in table 4 - 6 . table 4 - 6 font table format address offset size(byte) parameter description 0 128 width of each font character, in pixels 128 4 font bitmap format, for example l1 , l4 or l8 132 4 font line stride, in bytes 136 4 font width, in pixels 140 4 font height, in pixels 144 4 pointer to font image data in memory the rom font s are stored in the memory space rom_font. the rom font table is also stored in the rom. the starting address of rom font table for font index 16 is stored at rom_font_addr , with other font tables follow . the rom font table and individual character width (in pixel) are listed in table 4 - 7 through table 4 - 9 . copyright ? 2013 future technology devices international limited 22 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 table 4 - 7 rom font table font index 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 font format l1 l1 l1 l1 l1 l1 l1 l1 l1 l1 l4 l4 l4 l4 l4 l4 line stride 1 1 1 1 2 2 2 3 3 4 6 8 9 11 14 18 font width 8 8 8 8 10 13 14 17 24 30 12 16 18 22 28 36 font height 8 8 16 16 13 17 20 22 29 38 16 20 25 28 36 49 image pointer start address (hex) ffbfc ff7fc feffc fe7fc fdafc fcd3c fbd7c fa17c f7e3c f3d1c f201c edc1c e7f9c e01bc d2c3c bb23c table 4 - 8 rom font character width (1) font index 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 ascii character width in pixels 0 null 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 1 soh 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 2 stx 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 3 etx 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 4 eot 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 5 enq 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 6 ack 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 7 bel 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 8 bs 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 9 ht 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 10 lf 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 11 vt 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 12 ff 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 13 cr 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 14 so 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 15 si 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 16 dle 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 17 dc1 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 18 dc2 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 19 dc3 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 20 dc4 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 21 nak 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 22 syn 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 23 etb 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 24 can 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 25 em 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 26 sub 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 27 esc 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 28 fs 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 29 gs 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 30 rs 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 31 us 8 8 8 8 0 0 0 0 0 0 0 0 0 0 0 0 32 space 8 8 8 8 3 4 5 5 6 9 3 4 5 6 8 10 33 ! 8 8 8 8 3 4 5 6 6 9 4 4 6 6 8 11 34 " 8 8 8 8 4 5 6 5 8 12 5 6 8 9 11 15 35 # 8 8 8 8 6 8 9 10 14 19 9 11 13 15 19 26 36 $ 8 8 8 8 6 8 9 10 13 18 8 10 12 14 18 24 37 % 8 8 8 8 9 12 14 16 22 29 10 12 15 18 23 31 38 & 8 8 8 8 8 10 11 13 17 22 9 11 13 15 19 26 39 ' 8 8 8 8 2 3 3 3 6 6 3 4 5 5 7 9 40 ( 8 8 8 8 4 5 6 6 8 11 5 6 7 8 11 14 41 ) 8 8 8 8 4 5 6 6 8 11 5 6 7 8 10 14 copyright ? 2013 future technology devices international limited 23 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 font index 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 42 * 8 8 8 8 4 7 6 7 10 13 6 7 9 10 13 18 43 + 8 8 8 8 6 9 10 10 14 19 8 10 12 14 18 24 44 , 8 8 8 8 3 3 4 5 6 9 3 4 5 5 7 9 45 - 8 8 8 8 4 4 5 6 8 11 6 8 9 11 14 19 46 . 8 8 8 8 3 3 4 5 6 9 4 5 6 6 8 11 47 / 8 8 8 8 3 4 5 5 7 9 6 7 9 10 13 17 48 0 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 49 1 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 50 2 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 51 3 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 52 4 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 53 5 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 54 6 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 55 7 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 56 8 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 57 9 8 8 8 8 6 8 9 10 13 18 8 10 12 14 17 24 58 : 8 8 8 8 3 3 4 5 6 9 4 4 5 6 8 11 59 ; 8 8 8 8 3 4 4 5 6 9 4 4 5 6 8 11 60 < 8 8 8 8 6 8 10 10 15 19 7 9 11 12 16 21 61 = 8 8 8 8 5 9 10 11 15 19 8 10 12 14 17 24 62 > 8 8 8 8 6 8 10 10 15 19 7 9 11 13 16 22 63 ? 8 8 8 8 6 8 9 10 12 18 7 8 10 11 15 20 table 4 - 9 rom font character width (2) font index 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 ascii character width in pixels 64 @ 8 8 8 8 11 13 17 18 25 34 13 15 19 21 28 38 65 a 8 8 8 8 7 9 11 13 17 22 9 11 13 15 20 27 66 b 8 8 8 8 7 9 11 13 17 22 9 11 13 15 20 27 67 c 8 8 8 8 8 10 12 14 18 24 9 11 13 15 20 27 68 d 8 8 8 8 8 10 12 14 18 24 9 12 14 16 21 28 69 e 8 8 8 8 7 9 11 13 16 22 8 9 12 13 17 23 70 f 8 8 8 8 6 8 10 12 14 20 8 9 12 13 17 23 71 g 8 8 8 8 8 11 13 15 19 25 9 12 14 16 21 28 72 h 8 8 8 8 8 10 12 14 18 24 10 12 15 17 22 30 73 i 8 8 8 8 3 4 4 6 8 9 4 5 6 7 9 12 74 j 8 8 8 8 5 7 8 10 13 16 8 9 12 13 17 23 75 k 8 8 8 8 7 9 11 13 18 22 9 11 14 15 20 27 76 l 8 8 8 8 6 8 9 11 14 18 8 9 12 13 17 23 77 m 8 8 8 8 9 12 13 16 21 27 12 15 18 21 27 36 78 n 8 8 8 8 8 10 12 14 18 24 10 12 15 17 22 30 79 o 8 8 8 8 8 11 13 15 18 25 10 12 14 16 21 29 80 p 8 8 8 8 7 9 11 13 16 22 9 11 13 15 20 27 81 q 8 8 8 8 8 11 13 15 18 26 10 12 15 17 22 29 82 r 8 8 8 8 7 10 12 14 17 24 9 11 13 15 20 27 83 s 8 8 8 8 7 9 11 13 16 22 9 10 13 15 19 26 84 t 8 8 8 8 5 9 10 12 16 20 9 10 13 14 19 25 85 u 8 8 8 8 8 10 12 14 18 24 9 12 14 16 21 28 86 v 8 8 8 8 7 9 11 13 17 22 12 11 14 15 20 27 87 w 8 8 8 8 9 13 15 18 22 31 9 15 18 21 27 36 88 x 8 8 8 8 7 9 11 13 17 22 9 11 13 15 20 27 89 y 8 8 8 8 7 9 11 13 16 22 8 11 13 15 20 27 90 z 8 8 8 8 7 9 10 12 15 20 4 10 13 14 19 25 91 [ 8 8 8 8 3 4 5 5 7 9 6 5 6 7 8 11 92 \ 8 8 8 8 3 4 5 5 7 9 4 7 9 10 13 18 93 ] 8 8 8 8 3 4 5 5 7 9 6 5 6 6 8 11 94 ^ 8 8 8 8 6 7 8 9 12 16 7 7 9 10 13 18 copyright ? 2013 future technology devices international limited 24 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 font index 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 95 _ 8 8 8 8 6 8 9 11 14 18 4 8 10 11 15 20 96 ` 8 8 8 8 3 5 6 4 7 11 8 5 7 8 10 13 97 a 8 8 8 8 5 8 9 11 13 18 8 9 12 13 17 23 98 b 8 8 8 8 6 7 9 11 14 18 7 10 12 14 18 24 99 c 8 8 8 8 5 7 8 10 12 16 8 9 11 13 16 22 100 d 8 8 8 8 6 8 9 11 14 18 7 10 12 14 18 24 101 e 8 8 8 8 5 8 9 10 13 18 5 9 11 13 16 22 102 f 8 8 8 8 4 4 5 6 8 9 8 6 8 9 11 15 103 g 8 8 8 8 6 8 9 11 14 18 8 10 12 14 18 24 104 h 8 8 8 8 6 8 9 10 13 18 4 10 12 14 18 24 105 i 8 8 8 8 2 3 3 4 6 7 4 4 5 6 8 11 106 j 8 8 8 8 2 3 4 4 6 7 8 4 5 6 8 11 107 k 8 8 8 8 5 7 8 9 12 16 4 9 11 13 16 22 108 l 8 8 8 8 2 3 3 4 6 7 12 4 5 6 8 11 109 m 8 8 8 8 8 11 14 16 20 27 8 15 18 21 27 37 110 n 8 8 8 8 6 8 9 10 14 18 8 10 12 14 18 24 111 o 8 8 8 8 6 8 9 11 13 18 8 10 12 14 18 24 112 p 8 8 8 8 6 8 9 11 14 18 8 10 12 14 18 24 113 q 8 8 8 8 6 8 9 11 14 18 5 10 12 14 18 24 114 r 8 8 8 8 4 5 5 6 9 11 7 6 7 8 11 15 115 s 8 8 8 8 5 7 8 9 12 16 5 9 11 13 16 22 116 t 8 8 8 8 4 4 5 6 8 9 8 6 7 8 10 13 117 u 8 8 8 8 5 7 9 10 14 18 7 10 12 14 18 24 118 v 8 8 8 8 6 7 8 10 13 16 11 9 11 12 16 21 119 w 8 8 8 8 8 10 12 14 18 23 7 13 16 18 23 32 120 x 8 8 8 8 6 7 8 10 12 16 7 9 11 12 16 21 121 y 8 8 8 8 5 7 8 10 13 16 7 9 11 12 16 21 122 z 8 8 8 8 5 7 8 9 12 16 5 9 11 12 16 21 123 { 8 8 8 8 3 5 6 6 8 11 3 6 7 8 11 14 124 | 8 8 8 8 3 3 4 5 6 9 5 4 5 6 8 10 125 } 8 8 8 8 3 5 6 6 8 11 10 6 7 8 11 14 126 ~ 8 8 8 8 7 8 10 10 14 19 3 12 14 16 21 29 127 del 8 8 8 8 0 0 0 0 0 0 2 4 5 6 8 10 4.4 parallel rgb interface the rgb parallel interface consist s of 23 signal s - disp , pclk , vsync , hsync , de , 6 signals each for r , g and b . several registers configure the lcd operation of these signals as follow: reg_ pclk is the pclk divisor the default is 0, and disable s the pclk output. pclk frequency = system clock frequency / reg_pclk pclk_pol define the clock polarity , =0 for positive active clock edge, and 1 for negative clock edge. reg_cspread control s the transition of rgb signals with respect to pclk active clock edge . w hen reg_cspread=0, r[7:2],g[7:2] and b[7:2] signal s change following the active edge of pclk. when reg_cspread=1, r[7:2] change s a pclk clock early and b[7:2] a pclk clock later , which help s reduce the switching noise . reg_dither ena bles colo u r dither ; the default is enable d. t his option improves the half - tone appearance on displays. internally , the graphics engine compute s the colo u r values at an 8 bit precision; however, the lcd colour at a lower precision is sufficient . the FT800 output is only 6 copyright ? 2013 future technology devices international limited 25 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 bits per colo u r in 6:6:6 formats and a 2x2 dither matrix allow the truncated bits to contribute to the final colo u r value s . reg_outbits gives the bit width of each colour channel, the default is 6, 6, 6 bits for each rgb colo u r. a l ower value means fewer bits are output for each channel allowing dither ing o n lower precision lcd displays . reg_swizzle controls the arrangement of the output colo u r pins, to help the pcb route different lcd panel arrangements. bit 0 of the register cause s the order of bits in each colo u r channel to be reversed. bits 1 - 3 control the rgb order. setting bit 1 causes r and b channels to be swapped . setting bit 3 allows rotation to be enabled . if b it 3 is set, then (r,g,b) is rotated right if bit 2 is one, or left if bit 2 is zero. table 4 - 10 reg_swizzle rgb pins mapping reg_swizzle pins b3 b2 b1 b0 r7 , r6 , r5 , r4 , r3 , r2 g7 , g6 , g5 , g4 , g3 , g2 b7 , b6 , b5 , b4 , b3 , b2 0 x 0 0 r[7:2] g[7:2] b[7:2] power on default 0 x 0 1 r[2:7] g[2:7] b[2:7] 0 x 1 0 b[7:2] g[7:2] r [7:2] 0 x 1 1 b[ 2 : 7 ] g[ 2 : 7 ] r [ 2 : 7 ] 1 0 0 0 g[7:2] b[7:2] r[7:2] 1 0 0 1 g[ 2 : 7 ] b[ 2 : 7 ] r[ 2 : 7 ] 1 0 1 0 g[7:2] r[7:2] b[7:2] 1 0 1 1 g[ 2 : 7 ] r[ 2 : 7 ] b[ 2 : 7 ] 1 1 0 0 b[7:2] r[7:2] g[7:2] 1 1 0 1 b[ 2 : 7 ] r[ 2 : 7 ] g[ 2 : 7 ] 1 1 1 0 r[7:2] b[7:2] g[7:2] 1 1 1 1 r[ 2 : 7 ] b[ 2 : 7 ] g[ 2 : 7 ] copyright ? 2013 future technology devices international limited 26 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.5 miscellaneous control 4.5.1 backlight control pin the backlight control pin is a pulse width modulated (pwm) signal controlled by two registers: reg_pwm_hz and reg_pwm_duty . r eg_pwm_hz specifies the pwm output frequency, the range is 250 - 10000 hz. reg_pwm_duty specifies the duty cycle ; the range is 0 - 128. a value of 0 means that the pwm is completely off and 128 means completely on. 4.5.2 disp control pin the disp pin is a general purpose output that can be use d to enable or as a reset control to lcd display panel. the pin is control led by writing to bit 7 of reg_gpio register. 4.5.3 general purpose io pins the gpio1 and gpio0 pins are default input s . write '1' to bit 1 and 0 of reg_gpio_dir to change to output pins respectively. in i 2 c mode the gpio0 is used as sa2 and is not available as gpio. gpio1 and gpio0 are read from or write to b it 1 and 0 of reg_gpio register. gpio1 is recommended to be used as shutdo wn control for audio power amplifier. 4.5.4 pins drive current control the output drive current of output pins can be change d as per the follow ing table by writing to b it[6:2] of reg_gpio register: table 4 - 11 outp ut drive current selection reg_gpio bit[6:5] bit[4] bit[3:2] value 00b # 01b 10b 11b 0b # 1b 00b # 01b 10b 11b drive current 4ma 8ma 12ma 16ma 4ma 8ma 4ma 8ma 12ma 16ma pins gpio1 gpio0 pclk disp vsync hsync de r7..r2 g7..g2 b7..b2 backlight miso int_n note : # default value copyright ? 2013 future technology devices international limited 27 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.6 audio engine FT800 provide s mono audio output through a pwm output pin, audio_l. it output s the two audio sources, the sound synth esizer and audio file playback. 4.6.1 sound synthesizer a sound processor, audio engine , generate s the s ound effects from a s mall rom library of wave s table . to play a sound effect listed in table 4.3 , load the reg _ sound register with a code value and write 1 to the reg _ play register. the reg _ play register reads 1 while the effect is playing and return s a 0 when the effect s end . some sound effect s play continuously u ntil it is interrupted or command ed to play the next sound effect. to interrupt an effect, write a new value to reg _ sound and reg _ play registers ; e . g . write 0 (silence) to reg_sound and 1 to peg _play to stop the sound effect. the sound volume is controlled by register reg_vol_sound. the 16 - bit reg _ sound register takes an 8 - bit sound in the low byte. for some sounds, marked "pitch adjust" in the table below, the high 8 bits contain a midi note val ue. for these sounds, note value of zero indicates middle c. for other sounds the high byte of reg _ sound is ignored. table 4 - 12 sound effect value effect conti nuous pitch adjust value effect conti nuous pitch adjust 00h silence y n 32h dtmf 2 y n 01h square wave y y 33h dtmf 3 y n 02h sine wave y y 34h dtmf 4 y n 03h sawtooth wave y y 35h dtmf 5 y n 04h triangle wave y y 36h dtmf 6 y n 05h beeping y y 37h dtmf 7 y n 06h alarm y y 38h dtmf 8 y n 07h warble y y 39h dtmf 9 y n 08h carousel y y 40h harp n y 10h 1 short pip n y 41h xylophone n y 11h 2 short pips n y 42h tuba n y 12h 3 short pips n y 43h glockenspiel n y 13h 4 short pips n y 44h organ n y 14h 5 short pips n y 45h trumpet n y 15h 6 short pips n y 46h piano n y 16h 7 short pips n y 47h chimes n y 17h 8 short pips n y 48h music box n y 18h 9 short pips n y 49h bell n y 19h 10 short pips n y 50h click n n 1ah 11 short pips n y 51h switch n n 1bh 12 short pips n y 52h cowbell n n 1ch 13 short pips n y 53h notch n n 1dh 14 short pips n y 54h hihat n n 1eh 15 short pips n y 55h kickdrum n n 1fh 16 short pips n y 56h pop n n 23h dtmf # y n 57h clack n n 2ch dtmf * y n 58h chack n n 30h dtmf 0 y n 60h mute n n 31h dtmf 1 y n 61h unmute n n copyright ? 2013 future technology devices international limited 28 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 table 4 - 13 midi note effect midi note ansi note f req (hz) midi note ansi note f req (hz) 21 a0 27.5 65 f4 349.2 22 a#0 29.1 66 f#4 370.0 23 b0 30.9 67 g4 392.0 24 c1 32.7 68 g#4 415.3 25 c#1 34.6 69 a4 440.0 26 d1 36.7 70 a#4 466.2 27 d#1 38.9 71 b4 493.9 28 e1 41.2 72 c5 523.3 29 f1 43.7 73 c#5 554.4 30 f#1 46.2 74 d5 587.3 31 g1 49.0 75 d#5 622.3 32 g#1 51.9 76 e5 659.3 33 a1 55.0 77 f5 698.5 34 a#1 58.3 78 f#5 740.0 35 b1 61.7 79 g5 784.0 36 c2 65.4 80 g#5 830.6 37 c#2 69.3 81 a5 880.0 38 d2 73.4 82 a#5 932.3 39 d#2 77.8 83 b5 987.8 40 e2 82.4 84 c6 1046.5 41 f2 87.3 85 c#6 1108.7 42 f#2 92.5 86 d6 1174.7 43 g2 98.0 87 d#6 1244.5 44 g#2 103.8 88 e6 1318.5 45 a2 110.0 89 f6 1396.9 46 a#2 116.5 90 f#6 1480.0 47 b2 123.5 91 g6 1568.0 48 c3 130.8 92 g#6 1661.2 49 c#3 138.6 93 a6 1760.0 50 d3 146.8 94 a#6 1864.7 51 d#3 155.6 95 b6 1975.5 52 e3 164.8 96 c7 2093.0 53 f3 174.6 97 c#7 2217.5 54 f#3 185.0 98 d7 2349.3 55 g3 196.0 99 d#7 2489.0 56 g#3 207.7 100 e7 2637.0 57 a3 220.0 101 f7 2793.8 58 a#3 233.1 102 f#7 2960.0 59 b3 246.9 103 g7 3136.0 60 c4 261.6 104 g#7 3322.4 61 c#4 277.2 105 a7 3520.0 62 d4 293.7 106 a#7 3729.3 63 d#4 311.1 107 b7 3951.1 64 e4 329.6 108 c8 4186.0 copyright ? 2013 future technology devices international limited 29 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.6.2 audio p layback the FT800 can play back recorded sound through its audio output. to do this, load the original sound data into the FT800s ram , and set registers to start the playback. the registers controlling audio playback are: reg _ playback _ start: the start address of the audio data reg _ playback _ length: the length of the audio data, in bytes reg _ playback _ freq: the playback sampling frequency, in hz reg _ playback _ format: the playback format, one of linear samples, u law samples, or adpcm samples reg _ playback _ loop: if zero, sample is played once. if one, sample is repeated indefinitely reg _ playback _ play: a write to this location triggers the start of audio playback , r egardless of writing 0 or 1 . read back 1 when playback is ongoing, and 0 when playback finishes reg _ vol _ pb: playback volume, 0 - 255 the mono audio format supported is 8 - bits pcm, 8 - bits ulaw and 4 - bits ima - adpcm. for adpcm _ samples , each sample is 4 bits, so two samples are packed per byte , first sample is in bit s 0 - 3 and the second is in bit s 4 - 7. the current audio playback read pointer can be queried by reading the reg _ playback _ readptr. using a large sample buffer, looping, and this read pointer, the host mpu /mcu can supply a continuous stream of audio. 4.7 touch - s creen engine the touch - screen consist s of t ouch screen engine , adc, axis - switches, and adc input mu ltiplexer . the t ouch screen engine read s command s from the memory map register and generate s the required control signals to the axis - switches and input s mux and adc . the adc data are acquired and processed and update in the respective register for the mpu /mcu to read. figure 4 - 6 touch screen connection y+ y- x- x+ FT800 x+ y+ x- y- lcd touch screen copyright ? 2013 future technology devices international limited 30 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 the host control s the touch screen engine operation mode by writing the reg_touch_mode. table 4 - 14 touch controller operating mode reg_touch_mode mode description 0 off a cquisition stop ped, o nly touch detection interrupt is still valid. 1 one - shot perform acquisition once every time mpu write '1' to reg_touch_mode. 2 frame - sync perform acquisition for every frame sync ( ~60 data acquisition/second. 3 continuous perform acquisition continuously at approximately 1000 data acquisition / second. the touch screen engine capture s the raw x and y coordinate and write s to register reg_touch_raw xy. the range of these values is 0 - 1023. if the touch screen is not being pressed, both registe rs read 65535 (ffffh) . these touch values are transformed into screen coordinates using the matrix in registers reg _touch_transform_a - f. the post - transform coordinate s are available in register reg_touch_screen_ xy. if the touch screen is not being pressed, both registers read - 32768 ( 8000h ) . the values for reg touch transform a - f may be computed using an on - screen calibration process. if the screen is being touched, the screen coordinates are looked up in the scr een's tag buffer, delivering a final 8 - bit tag value, in reg touch tag. because the tag lookup takes a full frame, and touch coordinates change continuously, the original (x; y) used for the tag lookup is also available in reg _ touch _ tag _ xy. screen touch pr essure is available in reg _ touch _ rz. th e value is relative to the resistance of the touch contact , a lower value indicate s more pressure. the register default s to 32767 when touch is not detected . the reg_touch_threshold can be set to accept a touch only w hen the force threshold is exceeded. 4.8 power management 4.8.1 power supply the FT800 may be operated with a single supply of 3.3v apply to vcc and vccio pins. for operation with host mpu /mcu at lower supply, connect the vccio to mpu power to match the interface power . table 4 - 15 power supply symbol typical description vcc io 1.8v, or 2.5v, or 3.3v supply for host interface digital i/o pad only, lcd rgb interface supply from vcc . vcc 3.3v supply for chip copyright ? 2013 future technology devices international limited 31 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.8.2 internal regulator and por the 1.2v internal regulator provide s power to the core circuit. the regulator is disable d when device is in powerdown state. power down is activated either by the scu command write or by holding down the pd_n pin for at least 5ms to allow the 1.2v decoupling capacitor to discharge fully . the regulator is enable d only by releasing the pd_n pin. a 47k ? resistor is recommended to pull the pd_n pin up to vccio , together with a 100nf capacitor to ground in order to delay the 1.2v regulator powering up after the vcc and vccio are stable. the 1.2v internal regulator requires a compensation capacitor to be stable. a typical design puts a 4.7 uf capacitor with esr >0.5? is required between vcc1v2 to gnd pins. do no t connect any load to this pin. the 1.2v regulator will generate power - on - reset (por) pulse when the output voltage rises above the por threshold. the por will reset all the core digital circuits. it is possible to use pd_n pin as an asynchronous hardware r eset input. drive pd_n low for at least 5ms and then drive it high will reset the FT800 chip. figure 4 - 7 1.2v regulator vcc pd_n g n d vcc1v2 vcc gnd gnd gnd vccio c r cin 10uf 100nf 1.2v gnd ccomp 4.7uf 47k FT800 copyright ? 2013 future technology devices international limited 32 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.8.3 power modes when supply to vccio and vcc is applied, internal 1.2v regulator is powered by vcc. an internal por pulse will be generated during the regulator power up until it is stable. after the initial power up , the FT800 will stay in standby state . when needed, host can set FT800 to active state by performing a dummy read to address 0. the graphics engine, the audio engine and the touch engine are only functional in active state. to save power host can send command to put FT800 into any of the low power mode: standby, sleep and powerdown. in addi tion, host is allowed to put FT800 in powerdown mode by drive pd_n pin to low, regardless what current state it is in. refer to error! reference source not found. figure 4 - 8 for the power state transitions. figure 4 - 8 power state transition powerdown standby sleep vcc/vccio power on toggle pd_n from high to low active toggle pd_n from low to high toggle pd_n from high to low toggle pd_n from high to low or write command powerdown write command sleep write command standby dummy read 0 dummy read 0 copyright ? 2013 future technology devices international limited 33 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.8.3.1 active state in active state , the FT800 is in normal operati on . the crystal oscillator and pll are functioning. the system clock applied to the FT800 core engines is enabled. 4.8.3.2 standby state in standby state , th e crystal oscillator and pll remain functioning; the system clock app lied to the FT800 core engines is disabled . all register content s are retained. 4.8.3.3 sleep state in sleep state , the crystal oscillator , pll and system clock applied to the FT800 core engines are disabled . all register content s are retain ed. 4.8.3.4 powerdown state in powerdown state, the internal 1.2v regulator supplying the core digital logic , the crystal oscillator, the pll and the system clock applied to the FT800 core is disable d . all register content s are lost and reset to default when the chip is next switched on . 4.8.3.5 w ake up to active from other power states wake up from powerdown state require s the host to pull the pd_n pin down and release , a low to high transition enable s the 1.2v regulator. por generated when 1.2v is stable and FT800 will switch to standby mode after internal oscillator and pll are up (maximum 20ms from pd_n rising edge) . the clock enable sequence mentioned in section 4.2.3 shall b e executed to proper enable the system clock. from sleep state, host mpu read s at memory address 0 to wake the FT800 into active state. host needs to wait for at least 20ms before accessing any registers or commands. this is to guarantee the crystal oscill ator and pll are up and stable. from standby state, host mpu reads at memory address 0 to wake the FT800 into active state. host can immediately access any register or command. copyright ? 2013 future technology devices international limited 34 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 4.8.3.6 pin s tatus at d ifferent p ower s tates the FT800 pin status depends on the power state of the chip. see the following table for more details. at power transition from active to standby or active to sleep , all pins retain their previous status. the software needs to set audio_l , backlight and pclk to a known state b efore issuing power transition commands. table 4 - 16 pin status pin name reset state (vcc / vccio on) reset state (vcc / vccio on) default output drive strength active /standb y/sleep state (vcc / vccio on) powerdown state (vcc on / vcc1.2 off) hybrid mode (vcc off / vccio on) audio_l tristate output (hi - z) 16ma output retain previous state spi_sclk/ i2c_scl input (floating) input input (floating) miso/i2c _ sda tristate output (hi - z) 4ma input/output tristate output (hi - z) m osi /i2c _ sa0 input (floating) input input (floating) cs_n/i2c _ sa1 input (floating) input input (floating) gpio0/i2c _ sa2 input (floating) input/output tristate output (hi - z) gpio1 tristate output (hi - z) 4ma input/output tristate output (hi - z) mode input input input (floating) int_n open drain output (hi - z) 4ma open drain output tristate output (hi - z) pd_n input input input (floating) x1/clk input (floating) crystal oscillator input clk input note: if applicable, external clock on x1/clk pin should be removed x2 output (hi - z) crystal oscillator output copyright ? 2013 future technology devices international limited 35 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 continued pin name reset state (vcc/vccio on) reset state (vcc/vccio on) default output drive active/standby/ sleep state (vcc/vccio on) powerdown state (vcc on/vcc1.2 off) hybrid mode (vcc off/vccio on) x+ tristate output (hi - z) input/output retain previous state y+ tristate output (hi - z) input/output retain previous state x - tristate output (hi - z) input/output retain previous state y - tristate output (hi - z) input/output retain previous state backlight output 4ma output retain previous state de output 4ma output output low vsync output 4ma output output low hsync output 4ma output output low disp output 4ma output output low pclk output 4ma output output low r(7: 2 ), g(7: 2 ), b(7: 2 ) output 4ma output output low copyright ? 2013 future technology devices international limited 36 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 5 FT800 memory map all memory and registers in t he FT800 core are memory ma p p ed in 22 - bits address space with 2 - bits spi /i2c command prefix . prefix 0'b00 for read and 0'b10 for write to the address space, 0'b 0 1 reserved for host commands and 0'b11 undefined . the following are the memory space defined. table 5 - 1 FT800 memory map start address end address size name description 00 0000h 0 3 ffffh 256 kb ram_g main graphics ram 0 c 0000h 0 c 0003 h 4 b r om _chipid FT800 chip identification and revision information: byte [0:1] chip id: 0800 byte [2:3] version id: 0100 0b b23ch 0f fffbh 275 k b rom_font font table and bitmap 0f fffch 0f ffffh 4 b rom_font_addr font table pointer address 10 0 000h 10 1ff fh 8 kb ram_ d l display list ram 10 20 00h 10 23ffh 1 kb ram_pal palette ram 10 24 00 h 10 257fh 380 b reg_* registers 10 8 000 h 10 8fff h 4 kb ram_cmd command buffer note: the addresses beyond this table are reserved and shall not be read or written. copyright ? 2013 future technology devices international limited 37 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 5.1 FT800 registers table 5.1 shows the complete list of the FT800 r egisters. refer to FT800 programm er guide (ftdi doc ft_000793) chapter 2 for details of the register function . table 5 - 2 overview of FT800 registers address register name bit s acce ss reset value description 102400 h reg_id 8 r/o 7c h identif i cation register, always reads as 7ch 102404 h reg_frames 32 r/o 0 0000000h frame counter, since reset 102408 h reg_clock 32 r/o 0 0000000h clock cycles, since reset 10240 c h reg_frequency 27 r/w 0 2dc6c00 h main clock frequency 102410 h reg_rendermode 1 r/w 0 0h rendering mode: 0 = normal, 1 = single - line 102414 h reg_snapy 9 r/w 0 0h s can line select for rendermode 1 102418 h reg_snapshot 1 r/o - trigger for rendermode 1 10241 c h reg_cpureset 1 r/w 0 0h graphics, audio and touch engines reset control 102420 h reg_tap_crc 32 r/o - live video tap crc . frame crc is computed every dl swap. 102424 h reg_tap_mask 32 r/w ffffffff h live video tap mask 102428 h reg_hcycle 10 r/w 224 h horizontal total cycle count 10242 ch reg_hoffset 10 r/w 02b h horizontal display start o ff set 102430 h reg_hsize 10 r/w 1e0 h horizontal display pixel count 102434 h reg_hsync0 10 r/w 0 00h horizontal sync fall o ff set 102438 h reg_hsync1 10 r/w 029 h horizontal sync rise o ff set 10243 ch reg_vcycle 10 r/w 124 h vertical total cycle count 102440 h reg_voffset 10 r/w 00ch vertical display start o ff set 102444 h reg_vsize 10 r/w 110 h vertical display line count 102448 h reg_vsync0 10 r/w 0 00h vertical sync fall offset 10244 ch reg_vsync1 10 r/w 00 a h vertical sync rise offset 102450 h reg_dlswap 2 r/ w 00h display list swap control 102454 h reg_rotate 1 r/w 0 0h screen 180 degree rotate 102458 h reg_outbits 9 r/w 1b6 h output bit resolution, 3x3x3 bits copyright ? 2013 future technology devices international limited 38 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 address register name bit s acce ss reset value description 10245 ch reg_dither 1 r/w 1 output dither enable 102460 h reg_swizzle 4 r/w 0 0h output rgb signal swizzle 102464 h reg_cspread 1 r/w 1 output clock spreading enable 102468 h reg_pclk_pol 1 r/w 0 pclk polarity : 0 = output on pclk rising edge , 1 = output on pclk falling edge 10246 ch reg_pclk 8 r/w 0 0h pclk frequency divider, 0 = disable 102470 h reg_tag_x 9 r/w 0 00h tag query x coordinate 102474 h reg_tag_y 9 r/w 00 0 h tag query y coordinate 102478 h reg_tag 8 r/o 00h tag query result 10247 ch reg_vol_pb 8 r/w ff h volume for playback 102480 h reg_vol_sound 8 r/w ff h volume for synth esizer sound 102484 h reg_sound 16 r/w 0 000h sound effect select 102488 h reg_play 1 r/ w 0h start e f fect playback 10248 ch reg_gpio_dir 8 r/w 80 h gpio pin direction, 0 = input , 1 = output 102490 h reg_gpio 8 r/ w 00h gpio pin value (bit 0,1,7); output pin drive strength(bit 2 - 6) 10249 4h reserved - - - reserved 102498 h reg_int_flags 8 r/o 00h interrupt flags , clear by read 10249 ch reg_int_en 1 r/w 0h global interrupt enable 1024 a 0 h reg_int_mask 8 r/w ff h interrupt enable mask 1024 a 4 h reg_playback_start 20 r/w 0 0000h audio playback ram start address 1024 a 8 h reg_playback_lengt h 20 r/w 0 0000h audio playback sample length (bytes) 1024 ach reg_playback_readpt r 20 r/o - audio playback current read pointer 1024 b 0 h reg_playback_freq 16 r/w 1f40 h audio playback sampling frequency (hz) 1024 b 4 h reg_playback_forma t 2 r/w 0h audio playback format 1024 b 8 h reg_playback_loop 1 r/w 0 h audio playback loop enable copyright ? 2013 future technology devices international limited 39 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 address register name bit s acce ss reset value description 1024 bch reg_playback_play 1 r/o 0 h start audio playback 1024 c 0 h reg_pwm_hz 14 r/w 00 fa h backlight pwm output frequency (hz) 1024 c 4 h reg_pwm_duty 8 r/w 80 h backlight pwm output duty cycle 0=0%, 128=100% 1024 c 8 h reg_macro_0 32 r/w 0 0000000h display list macro command 0 1024 cch reg_macro_1 32 r/w 0 0000000h display list macro command 1 1024 d 0 h C command buffer write pointer 1024 ech reg_cmd_dl 13 r/w 0 000h command display list offset 1024 f 0 h reg_touch_mode 2 r/w 3 h touch - screen sampling mode 1024 f 4 h reg_touch_adc_mod e 1 r/w 1 h select single ended (low power) or differential (accurate) sampling 1024 f 8 h reg_touch_charge 16 r/w 1770 h touch - screen charge time, units of 6 clocks 1024 fch reg_touch_settle 4 r/w 3 h touch - screen settle time, units of 6 clocks 102500 h reg_touch_oversamp le 4 r/w 7 h touch - screen oversample factor 102504 h reg_touch_ rzthresh 16 r/w ffff h touch - screen resistance threshold 102508 h reg_touch_ raw_xy 32 r/o - touch - screen raw (x - msb16 ; y - lsb16 ) 10250 ch reg_touch_rz 16 r/o - touch - screen resistance 102510 h reg_touch_ screen_xy 32 r/o - touch - screen screen (x - msb16 ; y - lsb16 ) 102514 h reg_touch_ tag_xy 32 r/o - touch - screen screen (x - msb16 ; y - lsb16 ) used for tag lookup 102518 h reg_touch_tag 8 r/o - touch - screen tag result 10251 ch reg_touch_transfor m_a 32 r/w 000 10000 h touch - screen transform coefficient (s15.16) copyright ? 2013 future technology devices international limited 40 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 address register name bit s acce ss reset value description 102520 h reg_touch_transfor m_b 32 r/w 0 0000000h touch - screen transform coefficient (s15.16) 102524 h reg_touch_transfor m_c 32 r/w 0 0000000h touch - screen transform coeff i cient (s15.16) 102528 h reg_touch_transfor m_d 32 r/w 0 0000000h touch - screen transform coefficient (s15.16) 10252 ch reg_touch_transfor m_e 32 r/w 000 10000 h touch - screen transform coefficient (s15.16) 102530 h reg_touch_transfor m_f 32 r/w 0 0000000h touch - screen transform coefficient (s15.16) 102534 h C C byte aligned. the value in bits column refers to the number of valid bits from bit 0 unless otherwise specified; other bits are reserved. copyright ? 2013 future technology devices international limited 41 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 6 devices characteristics and ratings 6.1 absolute maximum ratings the absolute maximum ratings for the ft 800 device are as follows. these are in accordance with the absolute maximum rating system (iec 60134). exceeding these may cause permanent damage to the de vice. table 6 - 1 absolute maximum ratings parameter value unit storage temperature - 65 to + 150 c floor life (out of bag) at factory ambient (30c / 60% relative humidity) 168 (ipc/jedec j - std - 033a msl level 3 compliant)* hours ambient temperature (power applied) - 40 to + 85 c vcc supply voltage 0 to + 4 v vccio supply voltage 0 to + 4 v dc input voltage - 0.5 to + ( vccio + 0.3 ) v * if the devices are stored out of the packaging , beyond this time limit , the devices should be baked before use. the devices should be ramped up to a temperature of + 125c and baked for up to 17 hours. copyright ? 2013 future technology devices international limited 42 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 6.2 dc characteristics table 6 - 2 operating voltage and current (ambient temper ature = - 40c to +85c) parameter description minimum typical maximum units conditions vccio vcc io o perating s upply v oltage 1.62 1.8 0 1.98 v normal operation 2.25 2.5 0 2.75 v 2.97 3.3 0 3.63 v vcc vcc o perating s upply v oltage 2.97 3.3 0 3.63 v normal operation icc1 power down current - 1 .0 - a power down mode icc 2 sleep current - 250 - a sleep mode icc 3 standby current - 1.5 - ma standby mode icc 4 operating c urrent - 24 - ma normal operation vcc 1v2 regulator output voltage - 1.20 - v normal operation table 6 - 3 digital i/o pin characteristics (vcc/vccio = +3.3v, standard drive level) parameter description minimum typical maximum units conditions voh output voltage high 2.4 - - v ioh=4ma vol output voltage low - - 0.4 v iol=4ma vi h input high voltage 2 .0 - - v v il input low voltage - - 0.8 v vth schmitt hysteresis voltage 0.3 0.45 0.5 v iin input leakage current - 10 - 10 ua vin = vccio or 0 ioz tri - state output leakage current - 10 - 10 ua vin = vccio or 0 copyright ? 2013 future technology devices international limited 43 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 table 6 - 4 digital i/o pin characteristics (vccio = +2.5v, standard drive level) parameter description minimum typical maximum units conditions voh output voltage high vccio - 0.4 - - v ioh= 4 ma vol output voltage low - - 0.4 v iol= 4 ma vih input high voltage 0.7 x vccio - - v - vil input low voltage - - 0.3 x vccio v - vth schmitt hysteresis voltage 0.28 0.39 0.5 v - iin input leakage current - 10 - 10 ua vin = vccio or 0 ioz tri - state output leakage current - 10 - 10 ua vin = vccio or 0 table 6 - 5 digital i/o pin characteristics (vccio = +1.8v, standard drive level) parameter description minimum typical maximum units conditions voh output voltage high vccio - 0.4 - - v ioh=4ma vol output voltage low - - 0.4 v iol=4ma vi h input high voltage 0.7 x vccio - - v - v il input low voltage - - 0.3 x vccio v - vth schmitt hysteresis voltage 0.25 0.35 0.5 v - iin input leakage current - 10 - 10 ua vin = vccio or 0 ioz tri - state output leakage current - 10 - 10 ua vin = vccio or 0 copyright ? 2013 future technology devices international limited 44 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 6.3 touch sense characteristics table 6 - 6 touch sense character istics ( vcc=3.3v ) parameter description minimum typical maximum units conditions rsw - on x - ,x+,y - and y+ drive on resistance - 5 10 ? rsw - off x - ,x+,y - and y+ drive off resistance 10m - - ? rpu touch sense pull up resistance 72k 100k 128k ? vth+ touch detection rising - edge threshold level 1.53 1.7 1.87 v vt h - touch detection falling - edge threshold level 1.17 1.3 - 1.47 v vhys touch detection hysteresis 0.36 0.39 0.4 v rl x - axis and y - axis drive load resistan c e 200 - - ? table 6 - 7 adc characteristics ( vcc=3.3v) description minimum typical maximum units conditions adc resolution - 10 - bits integral nonlinearity - +/ - 1 - lsb differential nonlinearity - +/ - 0.5 - lsb offset error - +/ - 2 - lsb copyright ? 2013 future technology devices international limited 45 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 6.4 ac characteristics 6.4.1 system clock table 6 - 8 system clock characteristics (ambient temperature = - 40c to + 85c ) parameter value unit minimum typical maximum crystal f requency - 12.00 0 - mhz x1/x2 c apacitance - 5 10 pf ext ernal clock input frequency - 12.00 0 - mhz d uty cycle 45 50 55 % input voltage on x1/clkin - 3.3 - v p - p 6.4.2 host interface spi mode 0 figure 6 - 1 spi interface timing copyright ? 2013 future technology devices international limited 46 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 table 6 - 9 spi interface timing specification parameter description vcc(i/o)=1.8v vcc(i/o)=2.5v vcc(i/o)=3.3v unit min max min max min max tsclk spi clock period 6 0 - 40 - 33 - ns tsclkl spi clock low duration 25 - 16 - 13 - ns tsclkh spi clock high duration 25 - 16 - 13 - ns tsac spi access time 16 - 16 - 16 - ns tisu input setup 12 - 11 - 11 - ns tih input hold 3 - 3 - 3 - ns tzo output enable delay 0 30 0 20 0 16 ns toz output disable delay 0 30 0 20 0 16 ns tod output data delay 0 24 0 15 0 12 ns tcsnh csn hold time 0 - 0 - 0 - ns 6.4.3 host interface i2c mode timing table 6 - 10 i2c interface timing parameter description standard - mode fast - mode fast - plus mode high speed mode unit min max min max min max min max fscl i2c scl clock frequency 0 100 0 400 0 1000 0 3400 khz tscll clock low period 4.7 - 1.3 - 0.5 - 0.16 - s tsclh clock high period 4.0 - 0.6 - 0.26 - 0.06 - s tsu data setup time 250 - 100 - 50 - 10 - ns thd data hold time 0 - 0 - 0 - 0 70 ns tr rise time - 1000 - 300 - 120 10 40 ns tf fall time - 300 - 300 - 120 10 40 ns copyright ? 2013 future technology devices international limited 47 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 6.4.4 rgb video t iming table 6 - 11 rgb video timing characteristics parameter description vcc=3.3v unit min typ max tpclk pixel clock period 78 104 - ns tpclkdc pixel clock duty cycle 40 - 60 % thc hsync to clock 30 - - ns thwh hsync width (reg_hsync1 - reg_hsync0) 1 41 - tpclk tvwh vsync width (reg_vsync1 - reg_vsync0) 1 10 - th th hsync cycle (reg_hcycle) - 525 - tpclk tvsu vsync setup 30 - - ns tvhd vsync hold 10 - - ns thsu hsync setup 30 - - ns thhd hsync hold 10 - - ns tdsu data setup 20 - - ns tdhd data hold 10 - - ns tesu de setup 30 - - ns tehd de hold 10 - - ns copyright ? 2013 future technology devices international limited 48 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 figure 6 - 2 rgb video signal timing copyright ? 2013 future technology devices international limited 49 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 7 application examples 7.1 examples of lcd interface connection figure 7 - 1 ft 800 reference design schematic copyright ? 2013 future technology devices international limited 50 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 8 package parameters the ft 800 is available in v qf n - 48 package. the solder reflow profile for all packages is described in following sections . 8.1 v qf n - 48 package dimensions figure 8 - 1 v qf n - 48 package dimensions copyright ? 2013 future technology devices international limited 51 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 8.2 solder reflow profile the ft 800 is supplied in a pb free vqfn - 48 package. the recommended solder reflow profile for the package is shown in figure 8 - 2 . figure 8 - 2 ft 800 solder reflow profile the recommended values for the solder reflow profile are detailed in error! reference source not found. . values are shown for both a completely pb free solder process (i.e. the ft 800 is used with pb free solder), and for a non - pb free solder process (i.e. the ft 800 is used with non - pb free sold er). table 8 - 1 reflow profile parameter values profile feature pb free solder process non - pb free solder process average ramp up rate (t s to t p ) 3c / second max. 3c / second max. preheat - temperature min (t s min.) - temperature max (t s max.) - time (t s min to t s max) 150c 200c 60 to 12 0 seconds 100c 150c 60 to 120 seconds time maintained above critical temperature t l : - temperature (t l ) - time (t l ) 217c 60 to 150 seconds 183c 60 to 150 seconds peak temperature (t p ) 260c 240c time within 5c of actual peak temperature (t p ) 20 to 40 seconds 2 0 to 4 0 seconds ramp down rate 6c / second max. 6c / second max. time for t= 25c to peak temperature, t p 8 minutes max. 6 minutes max. critical zone: when t is in the range t to t t e m p e r a t u r e , t ( d e g r e e s c ) time, t (seconds) 25 p t = 25 o c to t t p t p t l t preheat s t l ramp up l p ramp down t max s t min s copyright ? 2013 future technology devices international limited 52 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 9 ftdi chip contact information head office C glasgow, uk unit 1, 2 seaward place, centurion business park glasgow g41 1hh united kingdom tel: +44 (0) 141 429 2777 fax: +44 (0) 141 429 2758 e - mail (sales) sales 1 @ftdichip.com e - mail (support) support 1 @ftdichip.com e - mail (general enquiries) admin1@ftdichip.com branch office C taipei, taiwan 2f, no. 516, sec. 1, neihu road taipei 114 taiwan, r.o.c. tel: +886 (0) 2 8797 1330 fax: +886 (0) 2 8751 9737 e - mail (sales) tw.sales1@ftdichip.com e - mail (support) tw.support1@ftdichip.com e - mail (general enquiries) tw.admin1@ftdichip.com branch office C tigard , oregon, usa 7130 sw fir loop tigard , or 97223 usa tel: +1 (503) 547 0988 fax: +1 (503) 547 0987 e - mail (sales) us.sales@ftdichip.com e - mail (support) us.support@ftdichip.com e - mail (general enquiries) us.admin@ftdichip.com branch office C shanghai, china room 1103 , no. 666 west huai h ai road, changn ing district shanghai, 200052 china tel: +86 21 62351596 fax: +86 21 62351595 e - mail (sales) cn.sales@ftdichip.com e - mail (support) cn.support@ftdichip.com e - mail (general enquiries) cn.admin@ftdichip.com web site http:// www. ftdichip.com system and equipment manufacturers and designers are responsible to ensure that their systems, and any future technology devices international ltd (ftdi) devices incorporated in their syst ems, meet all applicable safety, regulatory and system - level performance requirements. all application - related information in this document (including application descriptions, suggested ftdi devices and other materials) is provided for reference only. whi le ftdi has taken care to assure it is accurate, this information is subject to customer confirmation, and ftdi disclaims all liability for system designs and for any applications assistance provided by ftdi. use of ftdi devices in life support and/or safe ty applications is entirely at the users risk, and the user agrees to defend, indemnify and hold harmless ftdi from any and all damages, claims, suits or expense resulting from such use. this document is subject to change without notice. no freedom to use patents or other intellectual property rights is implied by the publication of this document. neither the whole nor any part of the information contained in, or the product described in this document, may be adapted or reproduced in any material or electr onic form without the prior written consent of the copyright holder. future technology devices international ltd, unit 1, 2 seaward place, centurion business park, glasgow g41 1hh, united kingdom. scotland registered company number: sc136640 copyright ? 2013 future technology devices international limited 53 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 appendix a C references useful application notes appendix b - list of figures and tables list of figures figure 2 - 1 FT800 block diagram ................................ ................................ ................................ ..... 4 figure 2 - 2 FT800 system design diagram ................................ ................................ ....................... 4 figure 4 - 1 host interface options ................................ ................................ ................................ . 14 figure 4 - 2 spi interface 1.8 - 3.3v connection ................................ ................................ ................. 15 figure 4 - 3 spi interface 5v connection ................................ ................................ .......................... 15 figure 4 - 4 crstal oscillator connection ................................ ................................ ........................... 19 figure 4 - 5 external clock input ................................ ................................ ................................ .... 20 figure 4 - 6 touch screen connection ................................ ................................ .............................. 29 figure 4 - 7 1 .2v regulator ................................ ................................ ................................ ............ 31 figure 4 - 8 power state transition ................................ ................................ ................................ . 32 figure 6 - 1 spi interface timing ................................ ................................ ................................ .... 45 figure 6 - 2 rgb video signal timing ................................ ................................ .............................. 48 figure 7 - 1 FT800 reference design schematic ................................ ................................ ............... 49 figure 8 - 1 vqfn - 48 package dimensions ................................ ................................ ...................... 50 figure 8 - 2 FT800 solder reflow profile ................................ ................................ .......................... 51 copyright ? 2013 future technology devices international limited 54 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 list of tables table 3 - 1 FT800q pin description ................................ ................................ ................................ .... 9 table 4 - 1 host memory read transaction (spi) ................................ ................................ ............... 16 table 4 - 2 host memory write transaction (spi) ................................ ................................ .............. 17 table 4 - 3 host command transaction (spi) ................................ ................................ .................... 18 table 4 - 4 host command table ................................ ................................ ................................ .... 18 table 4 - 5 interrupt flags bit assignment ................................ ................................ ....................... 19 table 4 - 6 font table format ................................ ................................ ................................ ......... 21 table 4 - 7 rom font table ................................ ................................ ................................ ............. 22 table 4 - 8 rom font character width (1) ................................ ................................ ......................... 22 table 4 - 9 rom font character width (2) ................................ ................................ ......................... 23 table 4 - 10 reg_swizzle rgb pins mapping ................................ ................................ ................. 25 table 4 - 11 output drive current selection ................................ ................................ ...................... 26 table 4 - 12 sound effect ................................ ................................ ................................ .............. 27 table 4 - 13 midi note effect ................................ ................................ ................................ ......... 28 table 4 - 14 touch controller operating mode ................................ ................................ .................. 30 table 4 - 16 pin status ................................ ................................ ................................ .................. 34 table 5 - 1 FT800 memory map ................................ ................................ ................................ ...... 36 table 5 - 2 overview of FT800 registers ................................ ................................ .......................... 37 table 6 - 1 absolute maximum ratings ................................ ................................ ............................ 41 table 6 - 2 operating voltage and current ................................ ................................ ....................... 42 table 6 - 3 digital i/o pin characteristics (vcc/vccio = +3.3v, standard drive level) ......................... 42 table 6 - 4 digital i/o pin characteristics (vccio = +2.5v, standard drive level) ................................ 43 table 6 - 5 digital i/o pin characteristics (vccio = +1.8v, standard drive level) ................................ 43 table 6 - 6 touch sense characteristics (vcc=3.3v) ................................ ................................ ........ 44 table 6 - 7 adc characteristics (vcc=3.3v) ................................ ................................ .................... 44 table 6 - 8 system clock characteristics (ambient temperature = - 40c to +85c) .............................. 45 table 6 - 9 spi interface timing specification ................................ ................................ .................. 46 table 6 - 10 i2c interface timing ................................ ................................ ................................ ... 46 table 6 - 11 rgb video timing characteristics ................................ ................................ .................. 47 copyright ? 2013 future technology devices international limited 55 document no.: ft_000792 FT800 embedded video engine datasheet version 1.1 clearance no.: ftdi# 334 appendix c - revision history document title: FT800 embedded video engine datasheet document reference no.: ft_ 000792 clearance no.: ftdi# 334 product page: http://www.ftdichip.com/ eve .htm document feedback: ds_FT800 version 1.0 initial release 18 july 2013 version 1. 1 2 nd release 28 august 2013 |
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